Cache Memory and its design
1.

What is the high speed memory between the main memory and the CPU called?

A.  

Register Memory

B.  

Cache Memory

C.  

Storage Memory

D.  

Virtual Memory

2.

The Cache memory is implemented using the SRAM chips and not the DRAM chips. SRAM stands for Static RAM. It is faster and is expensive.

A.  

True

B.  

False

3.

Whenever the data is found in the cache memory it is called as _________

A.  

HIT

B.  

MISS

C.  

FOUND

D.  

ERROR

4.

LRU stands for ___________

A.  

Low Rate Usage

B.  

Least Rate Usage

C.  

Least Recently Used

D.  

Low Required Usage

5.

When the data at a location in cache is different from the data located in the main memory, the cache is called _____________

A.  

Unique

B.  

Inconsistent

C.  

Variable

D.  

Fault

6.

Which of the following is not a write policy to avoid Cache Coherence?

A.  

Write through

B.  

Write within

C.  

Write back

D.  

Buffered write

7.

Which of the following is an efficient method of cache updating?

A.  

Snoopy writes

B.  

Write through

C.  

Write within

D.  

Buffered write

8.

In ____________ mapping, the data can be mapped anywhere in the Cache Memory.

A.  

Associative

B.  

Direct

C.  

Set Associative

D.  

Indirect

9.

The number of sign bits in a 32-bit IEEE format is ____

A.  

1

B.  

11

C.  

9

D.  

23

10.

The transfer between CPU and Cache is ______________

A.  

Block transfer

B.  

Word transfer

C.  

Set transfer

D.  

Associative transfer