Instruction set architecture
1.

The number of memory-operands that are being supported by the typical ALU-instruction may be  varing from one to

A.  

Two

B.  

Three

C.  

Four

D.  

Five

2.

Modern Compiler Technology with its ability to effectively using larger numbers of

A.  

Memory

B.  

Registers

C.  

Stack

D.  

Queue

3.

If we have single memory address then the numbers of oprands allowed minimum, would be

A.  

1

B.  

2

C.  

3

D.  

4

4.

A GPR Computer having memory to memory operations can easily be ignored by the compiler and is used as

A.  

Load Architecture

B.  

Store Architecture

C.  

load-store computer

D.  

None of the above

5.

The operands working in the stack-architecture are implicitly

A.  

On bottom of the stack

B.  

On middle of the stack

C.  

On top of the stack

D.  

On top of queue

6.

In which of these modes, the immediate operand is included in the instruction itself?

A.  

register operand mode

B.  

immediate operand mode

C.  

register and immediate operand mode

D.  

none of the mentioned

7.

In register address mode, the operand is stored in

A.  

8-bit general purpose register

B.  

16-bit general purpose register

C.  

si or di

D.  

all of the mentioned

8.

In which of the following addressing mode, the offset is obtained by adding displacement and contents of one of the base registers?

A.  

direct mode

B.  

register mode

C.  

based mode

D.  

indexed mode

9.

In which of the following addressing mode, the offset is obtained by adding displacement, with the contents of SI ?

A.  

direct mode

B.  

register mode

C.  

based mode

D.  

indexed mode

10.

The address of a location of the operand is calculated by adding the contents of any of the base registers, with the contents of any of index registers in

A.  

based indexed mode with displacement

B.  

based indexed mode

C.  

based mode

D.  

indexed mode