Cache Memory and Pipelining
1.

______ have been developed specifically for pipelined systems.

A.  

Utility software

B.  

peed up utilities

C.  

Optimizing compilers

D.  

None of the mentioned

2.

The pipelining process is also called as ______

A.  

Superscalar operation

B.  

Assembly line operation

C.  

Von Neumann cycle

D.  

None of the mentioned

3.

The fetch and execution cycles are interleaved with the help of ________

A.  

Modification in processor architecture

B.  

Clock

C.  

Special unit

D.  

Control unit

4.

Each stage in pipelining should be completed within ___________ cycle.

A.  

1

B.  

2

C.  

3

D.  

4

5.

In pipelining the task which requires the least time is performed first.

A.  

True

B.  

False

6.

If a unit completes its task before the allotted time period, then _______

A.  

It’ll perform some other task in the remaining time

B.  

Its time gets reallocated to a different task

C.  

It’ll remain idle for the remaining time

D.  

None of the mentioned

7.

To increase the speed of memory access in pipelining, we make use of _______

A.  

Special memory locations

B.  

Special purpose registers

C.  

Cache

D.  

Buffers

8.

The periods of time when the unit is idle is called as _____

A.  

Stalls

B.  

Bubbles

C.  

Hazards

D.  

Hazards

9.

The contention for the usage of a hardware device is called ______

A.  

Structural hazard

B.  

Stalk

C.  

Deadlock

D.  

None of the mentioned

10.

The situation wherein the data of operands are not available is called ______

A.  

Data hazard

B.  

Stock

C.  

Deadlock

D.  

Structural hazard